![\"\"](\"http:\/\/ferrywahyuwibowo.my.id\/wp-content\/uploads\/2018\/06\/Xilinx-ISE-e1527933659568.png\")
<\/p>\nIn this article will be shown how to make a modular or circuit using VHDL code and then it will be simulated using TINA Software.
\nThe tools used in this article are XILINX ISE 14.7 and Tina Softwares.<\/p>\n
The first level, write a VHDL code using XILINX ISE 14.7 and save as format of .VHD in the desired folder as shown in Figure 1. Synthesize the code and simulate the waveform diagram using XILINX ISE 14.7.<\/p>\n
<\/p>\n
Fig. 1 VHDL Code is written in XILINX ISE 14.7<\/p>\n
After there is no error, open Tina software and make a new project as shown in Figure 2.<\/p>\n
![\"\"](\"http:\/\/ferrywahyuwibowo.my.id\/wp-content\/uploads\/2018\/06\/Tina-e1527934055199.png\")
<\/p>\n
Fig. 2 Tina Software<\/p>\n
Thus click Tools and choose New Macro Wizard as shown in Figure 3 or it can use a shortcut of SHIFT+CTRL+M.<\/p>\n
![\"\"](\"http:\/\/ferrywahyuwibowo.my.id\/wp-content\/uploads\/2018\/06\/NewMacroWizard-e1527934646976.png\")
<\/p>\n
Fig. 3 New Macro Wizard<\/p>\n
It will be directed to the New Macro Wizard Form as shown in Figure 4.<\/p>\n
![\"\"](\"http:\/\/ferrywahyuwibowo.my.id\/wp-content\/uploads\/2018\/06\/NewMacroWizardBoard-e1527936965950.png\")
<\/p>\n
Fig. 4 Form of New Macro Wizard<\/p>\n
Select the source of the macro, in this case, choose FROM FILE and click as shown in Figure 5.<\/p>\n
![\"\"](\"http:\/\/ferrywahyuwibowo.my.id\/wp-content\/uploads\/2018\/06\/FromFile-e1527936816947.png\")
<\/p>\n
Fig. 5 Select The Source of The Macro<\/p>\n
Thus, find the file of VHDL that has been saved previously as shown in Figure 6.<\/p>\n
![\"\"](\"http:\/\/ferrywahyuwibowo.my.id\/wp-content\/uploads\/2018\/06\/FileVHDL-e1527937671872.png\")
<\/p>\n
Fig. 6 Find File of VHDL Code<\/p>\n
Change the file type into .VHD to get the saved VHDL code as shown in Figure 7.<\/p>\n
![\"\"](\"http:\/\/ferrywahyuwibowo.my.id\/wp-content\/uploads\/2018\/06\/ChooseVHD-e1527938041554.png\")
<\/p>\n
Fig. 7 Change File Type into .VHD<\/p>\n
It will show the file formated .VHD as shown in Figure 8.<\/p>\n
![\"\"](\"http:\/\/ferrywahyuwibowo.my.id\/wp-content\/uploads\/2018\/06\/Choosefile-e1527938220143.png\")
<\/p>\n
Fig. 8 Choose File of .VHD<\/p>\n
Choose the desired file of .VHD and rename the macro as wished. Click open and it will show in the macro wizard form as shown in Figure 9.<\/p>\n
![\"\"](\"http:\/\/ferrywahyuwibowo.my.id\/wp-content\/uploads\/2018\/06\/Choosen-e1527938408206.png\")
<\/p>\n
Fig. 9 Chosen File<\/p>\n
Click next and it emerges a design of component shape. Let it in autogenerate shape as shown in Figure 10.<\/p>\n
![\"\"](\"http:\/\/ferrywahyuwibowo.my.id\/wp-content\/uploads\/2018\/06\/ComponentShape-e1527938697997.png\")
<\/p>\n
Fig. 10 Auto Generate Shape<\/p>\n
Thus, click next and it will show a component and its VHDL code as shown in Figure 11.<\/p>\n
![\"\"](\"http:\/\/ferrywahyuwibowo.my.id\/wp-content\/uploads\/2018\/06\/ComponentShapeVHDL-1-e1527950118872.png\")
<\/p>\n
Fig. 11 Component and its VHDL Code<\/p>\n
Thus click next and it will be delivered into next step as shown in Figure 12.<\/p>\n
![\"\"](\"http:\/\/ferrywahyuwibowo.my.id\/wp-content\/uploads\/2018\/06\/ComponentShapeTSM-e1527950302747.png\")
<\/p>\n
Fig. 12 Component and its VHDL Code<\/p>\n
Save macro as a file format of .TSM in the folder desired as shown in Figure 13.<\/p>\n
![\"\"](\"http:\/\/ferrywahyuwibowo.my.id\/wp-content\/uploads\/2018\/06\/ComponentShapeTSM-1-e1527950447757.png\")
<\/p>\n
Fig. 13 Saving Macro File<\/p>\n
It will show a message box that informs the file is ready to be used as shown in Figure 14. Click insert to get this component.<\/p>\n
![\"\"](\"http:\/\/ferrywahyuwibowo.my.id\/wp-content\/uploads\/2018\/06\/InsertComponent-e1527950882109.png\")
<\/p>\n
Fig. 14 File is ready to be used<\/p>\n
The component, in this case, could be shown in Figure 15.<\/p>\n
![\"\"](\"http:\/\/ferrywahyuwibowo.my.id\/wp-content\/uploads\/2018\/06\/DoneComponent-e1527951070235.png\")
<\/p>\n
Fig. 15 The Component<\/p>\n
When it is clicked on the right side, it can be seen the information of this component as shown in Figure 16.<\/p>\n
![\"\"](\"http:\/\/ferrywahyuwibowo.my.id\/wp-content\/uploads\/2018\/06\/InsertForm-e1527951375816.png\")
<\/p>\n
Fig. 16 The Component Information<\/p>\n
to change the behavior of the component, it could be modified the VHDL code by clicking an enter macro as shown in figure 17.<\/p>\n
![\"\"](\"http:\/\/ferrywahyuwibowo.my.id\/wp-content\/uploads\/2018\/06\/MacroForm-e1527951622440.png\")
<\/p>\n
Fig. 17 The Component VHDL Code<\/p>\n
The component designed can be used to simulate with other components in Tina Software. I hope this tutorial helps the user of the VHDL code to simulate their projects easier using Tina software.<\/p>\n
<\/p>\n
In Indonesia:<\/strong><\/p>\n Di artikel ini akan ditunjukkan bagaimana membuat bagian atau rangkaian menggunakan VHDL dan kemudian disimulasikan menggunakan perangkat lunak Tina. Pertama-tama, tulis kode VHDL menggunakan XILINX ISE 14.7 dan simpan menggunakan format .VHD di folder yang diinginkan sebagaimana ditunjukkan pada Gambar 1. Sintesis kode dan simulasikan diagram bentuk gelombang menggunakan XILINX ISE 14.7.<\/p>\n Gambar 1. Kode VHDL ditulis dalam XILINX ISE 14.7<\/p>\n Jika tidak ada error, buka Tina dan buat proyek baru sebagaimana dalam gambar 2.<\/p>\n Gambar 2. Aplikasi Tina<\/p>\n Kemudian klik Tools dan pilih New Macro Wizard sebagaimana dalam gambar 3 atau dapat menggunakan shortcut SHIFT+CTRL+M.<\/p>\n Gambar 3. New Macro Wizard<\/p>\n Hal tersebut akan mengarahkan ke form dari New Macro Wizard sebagaimana ditunjukkan dalam gambar 4.<\/p>\n Gambar 4. Form dari New Macro Wizard<\/p>\n Pilih file macro, dengan memilih FROM FILE lalu klik sebagaimana ditunjukkan dalam gambar 5.<\/p>\n Gambar 5. Pilih File Macro<\/p>\n Kemudian, cari file VHDL yang telah disimpan sebelumnya sebagaimana ditunjukkan dalam gambar 6.<\/p>\n Gambar 6. Cari File kode VHDL<\/p>\n Ubah tipe file ke dalam .VHD untuk mendapatkan kode VHDL yang disimpan sebagaimana ditunjukkan dalam gambar 7.<\/p>\n Gambar 7. Ubah tipe file ke dalam .VHD<\/p>\n Hal tersebut akan menunjukkan file yang berformat .VHD sebagaimana ditunjukkan dalam gambar 8.<\/p>\n Gambar 8. Pilih file .VHD<\/p>\n Pilih file yang diinginkan dari .VHD dan ganti nama macro sesuai yang diinginkan. Klik open dan akan menunjukkan dalam form macro wizard sebagaimana gambar 9.<\/p>\n Gambar 9. File terpilih<\/p>\n Klik next dan memunculkan rancangan bentuk komponen. Pilih bentuk autogenerate sebagaimana gambar 10.<\/p>\n Gambar 10 Bentuk Auto Generate<\/p>\n Lalu, klik next dan akan menunjukkan komponen dan VHDL-nya sebagaimana gambar 11.<\/p>\n Gambar 11. Komponen dan kode VHDL-nya<\/p>\n Lalu klik next dan akan menuju langkah berikutnya sebagaimana gambar 12.<\/p>\n Gambar 12. Komponen dan VHDL-nya<\/p>\n Simpan macro sebagai format file .TSM dalam folder yang diinginkan sebagaimana gambar 13.<\/p>\n Fig. 13 Menyimpan File Macro<\/p>\n Hal tersebut akan menunjukkan kotak pesan yang menginformasikan file siap untuk digunakan sebagaimana gambar 14. Klik insert untuk mendapatkan komponen tersebut.<\/p>\n Gambar 14. File siap digunakan<\/p>\n Komponen tersebut dapat ditunjukkan menurut gambar 15.<\/p>\n Gambar 15. Komponen<\/p>\n Ketika diklik pada sisi kanan maka akan muncul informasi dari komponen tersebut sebagaimana gambar 16.<\/p>\n Gambar 16. Informasi komponen<\/p>\n untuk mengubah watak komponen, dapat dimodifikasi kode VHDL dengan mengklik enter macro sebagaimana ditunjukkan pada gambar 17.<\/p>\n Gambar 17. Kode VHDL komponen<\/p>\n Komponen yang dirancang dapat disimulasikan dengan komponen lainnya di Tina. Semoga tutorial ini membantu pengguna VHDL untuk mensimulasikan proyeknya dengan mudah menggunakan Tina.<\/p>\n <\/p>\n <\/p>\n <\/p>\n","protected":false},"excerpt":{"rendered":" In this article will be shown how to make a modular or circuit using VHDL code and then it will be simulated using TINA Software. The tools used in this article are XILINX ISE 14.7 and Tina Softwares. The first level, write a VHDL code using XILINX ISE 14.7 and save as format of .VHD […]<\/p>\n","protected":false},"author":1,"featured_media":362,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":[],"categories":[33],"tags":[63,29,7,15,65,64,61,62,8,60],"_links":{"self":[{"href":"https:\/\/ferrywahyuwibowo.my.id\/index.php\/wp-json\/wp\/v2\/posts\/336"}],"collection":[{"href":"https:\/\/ferrywahyuwibowo.my.id\/index.php\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/ferrywahyuwibowo.my.id\/index.php\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/ferrywahyuwibowo.my.id\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/ferrywahyuwibowo.my.id\/index.php\/wp-json\/wp\/v2\/comments?post=336"}],"version-history":[{"count":14,"href":"https:\/\/ferrywahyuwibowo.my.id\/index.php\/wp-json\/wp\/v2\/posts\/336\/revisions"}],"predecessor-version":[{"id":369,"href":"https:\/\/ferrywahyuwibowo.my.id\/index.php\/wp-json\/wp\/v2\/posts\/336\/revisions\/369"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/ferrywahyuwibowo.my.id\/index.php\/wp-json\/wp\/v2\/media\/362"}],"wp:attachment":[{"href":"https:\/\/ferrywahyuwibowo.my.id\/index.php\/wp-json\/wp\/v2\/media?parent=336"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/ferrywahyuwibowo.my.id\/index.php\/wp-json\/wp\/v2\/categories?post=336"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/ferrywahyuwibowo.my.id\/index.php\/wp-json\/wp\/v2\/tags?post=336"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}
\nPerangkat yang digunakan adalah XILINX ISE 14.7 dan Tina.<\/p>\n<\/p>\n<\/p>\n<\/p>\n<\/p>\n<\/p>\n<\/p>\n<\/p>\n<\/p>\n<\/p>\n<\/p>\n<\/p>\n<\/p>\n<\/p>\n<\/p>\n<\/p>\n<\/p>\n<\/p>\n